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Umer
@sobanqasim430
FPGA Custom AI and ML Accelerator RTL Design
Pakistan
Englisch, Urdu
Über mich
FPGA and RTL Design Engineer with 3 years of experience delivering clean, optimized digital systems across FPGA prototyping, custom IP development, and AI hardware accelerators .My expertise covers RTL design in Verilog, VHDL, and SystemVerilog, custom IP, DSP algorithm development and MATLAB HDL Coder based design flows, protocol implementation including AXI4, UART, SPI, and MIPI CSI-2, custom floating point arithmetic units, pipelining and timing optimization, clock domain crossing, energy efficient design, verification and Python co-simulation with detailed technical documentation.
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Umer
offline •
Durchschnittliche Antwortzeit: 1 Stunde
Meine Dienstleistungen
Eingebettete Systeme & Internet der Dinge
I will design and implement fpga project using verilog and vhdl
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hima41
Schweiz
The seller is incredibly friendly and delivered my order much earlier than expected. Communication was excellent, with quick and clear responses throughout the process. I highly recommend him! Tysm
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