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Sherbin S
@sherbin_sm
VLSI Design Engineer
Indien
Tamil, Englisch, Malayalam
Über mich
I am an aspiring VLSI Design Engineer with a strong foundation in Digital Logic, Verilog HDL, VHDL, and FPGA prototyping. I have hands-on experience in AMBA protocols, IP integration, HLS, and hardware-software co-design on Xilinx Zynq platforms. I am seeking to leverage my hardware verification and RTL design skills in a professional engineering role.
Sherbin S
offline •
Meine Dienstleistungen
Eingebettete Systeme & Internet der Dinge
I will design and debug verilog rtl for fpga projects
