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Umar Salim
@salim_umar1
Pakistan
Englisch, Urdu
Über mich
I am an Electrical Engineer specializing in FPGA Design, ASIC RTL Design, Digital Design, and UVM Verification. I provide professional hardware design solutions using Verilog and SystemVerilog, including RTL coding, simulation, debugging, testbench development, and functional verification.
My expertise includes FPGA development, ASIC design, FSM, FIFO, UART, SPI, I2C, digital circuits, and custom RTL modules. I focus on clean, optimized, well-documented code with reliable verification. I help students, researchers, startups, and engineers bring their hardware ideas to life.
Kompetenzen
Umar Salim
offline •
Durchschnittliche Antwortzeit: 1 Stunde
Meine Dienstleistungen
Eingebettete Systeme & Internet der Dinge
I will design fpga and asic rtl using verilog and systemverilog
Programmierung & Technik
I will design and verify verilog and systemverilog rtl for fpga and digital systems
Arbeitserfahrung
Design Verification Engineer
IRADA Foundation • Vollzeit
Dec 2025 - Present • 10 mos
Develop and maintain UVM-based verification environments, including testbenches, sequences, drivers, monitors, scoreboards, assertions, and functional coverage. Verify RTL designs through simulation and debugging, create verification plans and test cases, analyze failures, and ensure the design meets its specification and coverage goals.
Network Virtualization Engineer
Huawei • Vollzeit
Dec 2024 - Nov 2025 • 11 mos
Deploy, configure, and test VNFs/CNFs on virtualized and containerized platforms such as KVM, Docker, Kubernetes, and OpenStack. Configure networks, automate deployments, and troubleshoot NFV infrastructure using Python/Bash/Ansible while monitoring performance, connectivity, and service reliability.
