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Mustansar Ali
@mustansar_alii
Verification Hardware Engineer
Pakistan
Englisch, Urdu, Punjabi
Über mich
I am Mustansar Ali, a Computer Engineering graduate from COMSATS University Lahore with skills in Verilog, SystemVerilog, VHDL, and UVM. I have worked on RTL design and verification projects including UART, SPI, I2C, AXI memory, APB_RAM, vending machine controller, and flip-flop verification. I also completed courses in Digital Logic Design, Verilog, SystemVerilog, and UVM. My interests are ASIC Design Verification, digital system design, and communication protocols, and I am eager to apply my knowledge and practical skills in the semiconductor industry.
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Mustansar Ali
offline •
Meine Dienstleistungen
Programmierung & Technik
I will do rtl design using verilog, vhdl and systemverilog
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george_oliver11
Großbritannien
Thank you for submitting the RTL design. I've reviewed the code, and it looks well-executed and aligns with the project specifications. The implementation is clear and concise, and I appreciate the attention to detail in your work. It's great to see everything delivered on time as well. I look forward to working with you again on future projects.
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