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Daud
@muhammad_daud10
Making digital design and verification easier
Pakistan
Englisch
Über mich
I am a Digital Design & Verification Engineer specializing in Verilog, SystemVerilog, UVM, and RTL design. I have hands-on experience in APB, AHB, AXI, RISC-V, UART, and SoC verification. I develop professional UVM testbenches, verification plans, constrained-random tests, RAL models, and functional coverage to ensure reliable designs. I am committed to delivering high-quality, well-documented, and on-time solutions for ASIC, FPGA, and digital design projects.
Kompetenzen
Daud
offline •
Meine Dienstleistungen
Eingebettete Systeme & Internet der Dinge
I will do dld, verilog, systemverilog, riscv and uvm verification
Eingebettete Systeme & Internet der Dinge
I will implement, debug and verify amba protocols ahb, apb and axi and spi, uart
Arbeitserfahrung
Digital Design Verifcation
Impare` • Vollzeit
Apr 2025 - Dec 2025 • 8 mos
I am a Digital Design and Verification Engineer with hands-on experience in designing and verifying IPs such as UART and AXI-based models. I have worked on verification of AHB Transaction Generators and the Ultra Ethernet Transport Layer using SystemVerilog and UVM, focusing on functional correctness, protocol compliance, and coverage-driven verification.
