Einige Informationen werden in englischer Sprache angezeigt.
Über mich
I’m a Digital Verification Engineer with a background in Electronics, Telecommunications & IT. I specialize in SystemVerilog, UVM, Verilog, and VHDL, building testbenches, debugging, and simulations in Simvision/QuestaSim. With experience in the semiconductor industry, I deliver reliable RTL verification, coverage analysis, and consulting. Expect professional work, clear communication, and on-time delivery.... Mehr lesen