I will do fpga based projects as well as matlab based projects

I have worked for one and half year as Research Assistant at Electrical Engineering Department, Sukkur IBA University. During this, I assisted to students on different FPGA based projects. I have worked on Xilinx’s Zynq Platforms such as Zybo, ZedBoard and PYNQ-Z1. I used Verilog HDL as well as IPs in my designs available in IP Integrator tool in Vivdao. I also introduced myself to SDK used to develop routines for accessing PL through PS. I am also aware of Vivado HLS flexibility which allows designers to build customized hardware targeted IPs using C/C++. In this period, I learnt about core concepts involved in hardware architecture such as AXI bus, GPIOs, ACP, HP ports and different types of memories. I often worked on Arduino, MATLAB, Simulink and machine learning projects that helped to enrich my skills in C/C++ and Python. Along with that, I am also connected with latest trends in FPGA like Versel ACAP and Vitis design flexibility. Since time now, I have been working independently, but I hope to perform in a better way, if I will get chance to work on industry driven project.